In order to be able to fabricate integrated circuits (ICs) of increased performance than is currently feasible, device contacts must be developed which reduce the electrical contact resistance to the ICs' Si body or integrated electronic device formed therein. A contact is the electrical connection, at the Si surface, between the devices in the Si wafer and the metal layers, which serve as interconnects. Interconnects serve as the metal wiring that carry electrical signals throughout the chip.
Silicide contacts are of specific importance to IC's, including complementary metal oxide semiconductor (CMOS) devices because of the need to reduce the electrical resistance of the many Si contacts, at the source/drain and gate regions, in order to increase chip performance. Silicides are metal compounds that are thermally stable and provide for low electrical resistivity at the Si/metal interface. Silicides generally have lower barrier heights thereby improving the contact resistance. Reducing contact resistance improves device speed therefore increasing device performance.
Silicide formation typically requires depositing a refractory metal such as Ni, Co or Ti onto the surface of a Si-containing material or wafer. Conventional processing of Ni silicide films begins with depositing a Ni layer with a thickness of about 8 to 12 nm.
The thickness of the resulting silicide is twice the thickness of the deposited Ni layer, i.e. Ni layers with a thickness of about 8 to 12 nm form silicides with a thickness of about 16 to 24 nm, respectively. Following deposition, the structure is then subjected to an annealing step using conventional processes such as, but not limited to, rapid thermal annealing. During thermal annealing, the deposited metal reacts with Si forming a metal silicide. Following anneal a 10 nm Ni metal layer forms a Ni silicide that has a thickness of approximately 20 nm.
Ni may serve as a metal for silicide formation. One advantage of Ni silicides is that Ni monosilicide contacts consume less Si than conventional Ti or Co silicide contacts. A disadvantage of Ni silicide contacts is that the higher resistivity Ni disilicide phase is produced during high temperature processing steps, rather than the preferred lower resistivity Ni monosilicide phase. The formation of the Ni disilicide phase is nucleation controlled and disadvantageously consumes more Si than the preferred Ni mono-silicide phase. Ni disilicides produce a rougher silicide/Si wafer interface and also have a higher sheet resistivity than the preferred Ni mono-silicide phase. A second disadvantage is that thin Ni monosilicide films tend to become discontinuous before Ni disilicide formation leading to high resistivity.
The highest processing temperatures of Ni silicide correspond to the boron phosphorus silicate glass densification anneal. Processing conventional Ni silicide films, of approximately 20 nm thickness, at temperatures greater than about 600° C. results in Ni silicides with a high sheet resistance. As depicted in FIG. 1, a 6 minute isothermal anneal of a conventional 24 nm Ni silicide film formed on standard poly-Si substrates at a temperature of about 660° C. increases the sheet resistance of the resultant Ni silicide by a factor of five. For 24 nm Ni silicide films formed on annealed poly-Si substrates, a 6-minute anneal at about 660° C. results in an increase of approximately 65% in the sheet resistance of the silicide film.
In view of the above, it would be highly desirable to provide a Ni monosilicide contact having low resistivity, and high temperature stability, while being easily fabricated utilizing well-known CMOS processing steps.